This document outlines the On Chip Debug Support (OCDS) built into the Tricore and how Hitex's innovative ASIC-based emulation techniques are used with it to provide a new generation of powerful debugging tools.
Hans-Peter Otterstätter, Hitex Development
Tools, Karlsruhe, Germany
Michael Beach, Hitex (UK) Ltd., Coventry, UK
Complete and reliable tool solutions for the embedded engineers made Hitex the largest manufacturer of in-circuit-emulators in Europe. 80% of engineers developing applications for the Infineon Technology C166 microcontroller are using our in-circuit emulators. This is due to a unique modular emulator concept allowing affordable entry level solutions which are easily upgradeable to the performance highest level i.e. the DProbe + DBbox approach. This highly integrated and sophisticated debug support could only be achieved through a very close relationship between the silicon manufacturer and the tool supplier.
Our track record based on years of accumulated debug tool expertise is why we are amongst the first Infineon Technology tool partner to support the TriCore architecture.
As with other recently announced microcontrollers, Tricore is equipped with additional debug support, present in every standard device. This debug support can be accessed via the JTAG interface using a simple connector cable. This concept enables tool suppliers to provide entry-level solutions to meet basic software debugging needs. Thus the initial cost for providing a development environment can be kept low.
According to many surveys and our own experience, almost 80% of software errors can be found by these kind of tools in about 20% of the project time allocated for debugging. Nevertheless, the small number of the most persistent bugs often require 80% of debugging time to remove and simple tools are usually inadequate. Reducing this time significantly helps eliminate project bottlenecks and overruns. To alleviate such problems, the TriCore architecture supplies two additional levels of On-Chip Debug Support (OCDS) to permit more powerful tools to be implemented. Both OCDS levels go far beyond the usual facilities offered via JTAG connectors.
Compared to monitor based solutions, the integrated debug support does not require any target resources (i.e. communication interface and memory) and the monitor control software is not disturbed by errors within the application software. On-chip solutions are able to detect the bus or internal events that a monitor cannot. However common to both solutions is the behaviour after a break condition has occurred: control is passed to the debug unit and the application software execution is blocked. This characteristic is often unacceptable when testing the hard real-time control systems that the Tricore is destined for.
This is not true for the innovative OCDS
solution however. A detected break event may still stop program
execution but it is optionally possible to produce just a trigger
signal for external test hardware, with software execution uninterrupted.
In addition, programming the priority level for the debug interrupt
allows the continued servicing of higher priority interrupts in
time-critical program sections whilst lower priority code is halted
for debugging. Another OCDS benefit is that read/write accesses
are possible on the Tricore internal busses across the entire
address space (including internal registers) during program execution
with only a very slight real-time violation. Thus any program
variable can be accessed "on-the-fly".
In order to find the hard-to-detect errors, this level provides additional support via a dedicated emulation chip that has additional signals bonded out to enable the tracing of program execution. This debug support level requires a direct connection to the target controller and needs additional hardware to record the program flow information.
The D-Family Debugging Solution for Tricore
Our emulation strategy for the TriCore toolchain based on the facilities offered by OCDS, outlined above. As the leader in the C166 market, we will introduce a similar but improved solution, based on our modular D-family concept. The main benefits of this tool platform are ease-of-use and the flexible upgrade path from entry-level to high-end. Due to our unique user interface HiTOP that already supports very sophisticated HLL debugging, the switch between different kinds of tools does not impose a significant learning curve.
The very high speed of some TriCore variants (up to 100MHz) demands very short signal paths and hence a very close coupling of the emulator to the target. This coupled with the integration of some typical emulator hardware functions into the silicon itself and Hitex's own ASIC building block technology means that all TriCore tools are very compact indeed.
Reflecting the different OCDS Levels the D-family for Tricore starts with an entry level solution that utilises the JTAG-Port and offers all functionality that can be accessed through OCDS level-1. Our well-known HiTOP debugger thus can offer unlimited software breakpoints, four hardware breakpoints and implements "Fastbreaks" for "on-the-fly" access to any memory or internal register location. In order to establish a fast link to the target system, our JTAG connection is linked via a special parallel interface to the host PC. A JTAG connector has to be supplied on the target hardware. It should be noted that the LXTC uses a customer hardware design and does not rely on generic printer-port "wigglers". This makes the download time and general respnosiveness of the HiTOP debugger much faster. In cases where no JTAG-connector can be provided, we offer also a direct adaptation to the footprint of the Tricore chip via our patented PressOn technology. This avoids the requirement of additional space for a JTAG-connector on the PCB, making it especially suited for debugging of production units.
Note: This unit was demonstrated for
the first time in public at the Embedded Systems Conference (Europe)
at the Hitex stand.
Another level of debug support is achieved with our DProbeTriCore. It uses OCDS level-2 with enhanced trace hardware based on the use of a dedicated emulation chip. Different trace buffer sizes range from 256K trace frames up to 2048K frames. Inspecting the trace buffer can be done during emulation without real-time violation. Various methods for time and performance measurements are available, as in existing Hitex systems. A dedicated real-time counter allows for exact measurement of task execution times. Each trace frame contains a timestamp, making statistical software performance analysis possible.
Figure 1. DprobeTricore With HiTOP
Both products share the same user interface which is common to all Hitex development tools. HiTOP supports all leading compilers and their object formats – specifically ELF/DWARF for the TriCore development tool chain. The wide and common use of HiTOP means that it is to some extent an accepted standard for emulator control software. Thus many other third party tools are already well integrated with HiTOP for the TriCore. Different real time operating systems (RTOS) are supported through custom displays of task lists and true task-awareness. Application design with CASE tools is getting more and more commonplace. Therefore we engineered a close link to Infineon Technology own EasyCode to give structogram level debugging.
However, selecting development tools from Hitex does not force you to use our user interface. The communication link to our DProbeTriCore hardware is via a GDI layer. This enables the developer to use also his favourite debugger from TASKING, Greenhills or other vendors supporting the GDI specification.
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In addition to DMonTriCore, the DProbeTriCore offers:
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